Secure Silicon: Towards Virtual Prototyping

Evaluating security vulnerabilities of software implementations at design step is of primary importance for applications developers, while it has received litte attention from scientific communauty. In this paper, we describe virtual prototyping of an implementation of Elliptic curve cryptography (ECC), aiming to make it secure against first-order horizontal and vertical side-channel attacks (SCAs). Reproducing information leakage as close to reality as possible requires bit- and clock-cycle accuracy, we got with Mentor Graphics Modelsim tool, simulating the execution of the ECC software implementations on PULPino, an open-source 32-bit microcontroller based on the recently released RISC-V instruction set architecture. For each clock cycle, we compute the number of bit toggles into microcontroller's registers, an image of the power consumption, and watch the program counter to identify the assembly instruction executed, then the corresponding C function. We first start with a naive double-and-add implementation relying on cryptographic primitives of the mbed TLS library, formerly PolarSSL before acquisition by ARM. The virtual analysis pinpoints differences in the way the double function on one side and the add function on the other side manage variables and internal operations, which can be used for horizontal SCAs. We propose some modifications of the C code, hence independent of the considered microcontroller, with an overhead extremely small compared to that of the double-and-add-always countermeasure. Then, we reiterate analyses, still for the mbed TLS library, but using the regular Montgomery ladder version, most used in practice as more efficient

From Substitution Box To Threshold

With the escalating demand for lightweight ciphers as well as side channel protected implementation of those ciphers in recent times, this work focuses on two aspects. First, we present a tool for automating the task of finding a Threshold Implementation (TI) of a given Substitution Box (SBox). Our tool returns `with decomposition\u27 and `without decomposition\u27 based TI. The `with decomposition\u27 based implementation returns a combinational SBox; whereas we get a sequential SBox from the `without decomposition\u27 based implementation. Despite being high in demand, it appears that this kind of tool has been missing so far. Second, we show an algorithmic approach where a given cipher implementation can be tweaked (without altering the cipher specification) so that its TI cost can be significantly reduced. We take the PRESENT cipher as our case study (our methodology can be applied to other ciphers as well). Indeed, we show over 31 percent reduction in area and over 52 percent reduction in depth compared to the basic threshold implementation

Pre-silicon evaluation of secured circuit against side-channel attacks

Les systèmes embarqués sont constamment menacés par diverses attaques, notamment les attaques side-channel. Pour garantir un certain niveau de sécurité, les implémentations cryptographiques doivent valider des tests d’évaluation recommandés par les standards de certifications, et ainsi répondre aux besoins du marché. Pour cette raison, il est nécessaire d’implémenter des contremesures fiables pour contrer ce type d’attaques. Néanmoins, une fois ces contremesures implémentées, les tests de vérification et de validation peuvent s’avérer très coûteux en temps et en argent. Ainsi, minimiser le nombre d’allers-retours, entre l’étape de conception et l’étape d’évaluation est primordial. Nous allons explorer une classe très large d’attaques existantes (passives et actives), et proposer des méthodes d’évaluations au niveau pré-silicium, permettant d’un côté, de détecter les différents types de fuites qu’un attaquant donné pourrait exploiter, et de l’autre, exposer des techniques de protection permettant de contrer ces attaques, tout en respectant l’aspect performance et taille en silicium. Nous nous basons dans nos analyses sur des méthodes formelles et empiriques, pour tracer l’impact de chaque vulnérabilité sur les différents niveaux d’abstraction du circuit, et ainsi proposer des contremesures optimales.Embedded systems are constantly threatened by various attacks, including side-channel attacks. To guarantee a certain level of security, cryptographic implementations must validate evaluation tests recommended by the certification standards, and thus meet the market needs. For this reason, it is necessary to implement reliable countermeasures to counter this type of attacks. However, once these countermeasures are implemented, verification and validation tests can be very costly in terms of time and money. Thus, optimizing the lifecycle of the circuit, between the design stage and the evaluation stage is paramount. We will explore a very broad class of existing attacks (passive and active), and propose methods of pre-silicon level assessments, allowing on the one hand, to detect the different types of leakages that a given attacker can exploit, and on the other hand, expose different techniques to counter these attacks, while respecting the performance and area aspect. In our analyses, we apply formal and empirical methods to track the impact of each vulnerability on the different abstraction levels of the circuit, and thus propose optimal countermeasure

Évaluation pré-silicium de circuits sécurisés face aux attaques par canal auxiliaire

Embedded systems are constantly threatened by various attacks, including side-channel attacks. To guarantee a certain level of security, cryptographic implementations must validate evaluation tests recommended by the certification standards, and thus meet the market needs. For this reason, it is necessary to implement reliable countermeasures to counter this type of attacks. However, once these countermeasures are implemented, verification and validation tests can be very costly in terms of time and money. Thus, optimizing the lifecycle of the circuit, between the design stage and the evaluation stage is paramount. We will explore a very broad class of existing attacks (passive and active), and propose methods of pre-silicon level assessments, allowing on the one hand, to detect the different types of leakages that a given attacker can exploit, and on the other hand, expose different techniques to counter these attacks, while respecting the performance and area aspect. In our analyses, we apply formal and empirical methods to track the impact of each vulnerability on the different abstraction levels of the circuit, and thus propose optimal countermeasuresLes systèmes embarqués sont constamment menacés par diverses attaques, notamment les attaques side-channel. Pour garantir un certain niveau de sécurité, les implémentations cryptographiques doivent valider des tests d’évaluation recommandés par les standards de certifications, et ainsi répondre aux besoins du marché. Pour cette raison, il est nécessaire d’implémenter des contremesures fiables pour contrer ce type d’attaques. Néanmoins, une fois ces contremesures implémentées, les tests de vérification et de validation peuvent s’avérer très coûteux en temps et en argent. Ainsi, minimiser le nombre d’allers-retours, entre l’étape de conception et l’étape d’évaluation est primordial. Nous allons explorer une classe très large d’attaques existantes (passives et actives), et proposer des méthodes d’évaluations au niveau pré-silicium, permettant d’un côté, de détecter les différents types de fuites qu’un attaquant donné pourrait exploiter, et de l’autre, exposer des techniques de protection permettant de contrer ces attaques, tout en respectant l’aspect performance et taille en silicium. Nous nous basons dans nos analyses sur des méthodes formelles et empiriques, pour tracer l’impact de chaque vulnérabilité sur les différents niveaux d’abstraction du circuit, et ainsi proposer des contremesures optimales

Side-Channel Evaluation Methodology on Software

Cryptographic implementations need to be robust amidst the widespread use of crypto-libraries and attacks targeting their implementation, such as side-channel attacks (SCA). Many certification schemes, such as Common Criteria and FIPS 140, continue without addressing side-channel flaws. Research works mostly tackle sophisticated attacks with simple use-cases, which is not the reality where end-to-end evaluation is not trivial. In this study we used all due diligence to assess the invulnerability of a given implementation from the shoes of an evaluator. In this work we underline that there are two kinds of SCA: horizontal and vertical. In terms of quotation, measurement and exploitation, horizontal SCA is easier. If traces are constant-time, then vertical attacks become convenient, since there is no need for specific alignment (“value based analysis”). We introduce our new methodology: Vary the key to select sensitive samples, where the values depend upon the key, and subsequently vary the mask to uncover unmasked key-dependent leakage, i.e., the flaws. This can be done in the source code (pre-silicon) for the designer or on the actual traces (post-silicon) for the test-lab. We also propose a methodology for quotations regarding SCA unlike standards that focus on only one aspect (like number of traces) and forgets about other aspects (such as equipment; cf. ISO/IEC 20085-1

Cache-Timing Attacks Still Threaten IoT Devices

International audienceDeployed widely and embedding sensitive data, IoT devices depend on the reliability of cryptographic libraries to protect user information. However when implemented on real systems, cryptographic algorithms are vulnerable to side channel attacks based on their execution behavior, which can be revealed by measurements of physical quantities such as timing or power consumption. Some countermeasures can be implemented in order to prevent those attacks. However those countermeasures are generally designed at high level description, and when implemented, some residual leakage may persist. In this article we propose a methodology to assess the robustness of the MbedTLS library against timing and cache-timing attacks. This comprehensive study of side-channel security allows us to identify the most frequent weaknesses in software cryptographic code and how those might be fixed. This methodology checks the whole source code, from the top level routines to low level primitives, that are used for the final application. We recover hundreds of lines of code that leak sensitive information

Fault Analysis Assisted by Simulation

International audienc